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{
 "cells": [
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# An introduction to gem5"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Introduction to gem5\n",
    "\n",
    "- Welcome to the redesigned exercises.\n",
    "  - Give feedback wether you like this\n",
    "\n",
    "- Goals\n",
    "  - Strengthen understanding of the Lectures\n",
    "  - Provide some tools for state of the art CA research\n",
    "  \n",
    "- Focus on gem5\n",
    "  - most widely used Simulator in CA-Research\n",
    "  - Lot's of Publications\n",
    "  \n",
    "- Exercise sessions are for you\n",
    "  - Please participate and ask questions"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 Developers\n",
    "\n",
    "\n",
    "Developed by a wide Range of Industrial and Academic Institutions\n",
    "\n",
    "![Developers](figures/gem5_developers.png)"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    " # gem5 Basics\n",
    " \n",
    " 1. gem5's components can be rearranged, parameterized, extended or replaced easily to suit your needs.\n",
    " 2. It simulates the passing of time as a series of discrete events.\n",
    " 3. Its intended use is to simulate one or more computer systems in various ways.\n",
    " 4. It's more than just a simulator; it's a simulator platform that lets you use as many of its premade components as you want to build up your own simulation system."
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Other SImulators\n",
    "\n",
    "\n",
    "| Simulator    |  Accuracy      | Supported processor architectures | License | Development Activity |\n",
    "|--------------|----------------|-----------------------------------|---------|----------------------|\n",
    "| Simics       | Functionally accurate  | Alpha, ARM, MIPS, PowerPC,  SPARC and x86         | Private | Yes                  |             \n",
    "| qemu         | Functionally accurate | x86, PowerPC, ARM, Sparc, MicroBlaze, Mico32 and others | Open | Yes | \n",
    "| PTLsim       | Cycle accurate | x86                               | Open    | Yes                  |\n",
    "| SimpleScalar | Cycle accurate | Alpha, ARM, PowerPC and x86       | Open    | No                   |\n",
    "| OVPsim       | Instruction accurate    | Open RISC, ARM, ARC, MIPS, PowerPC, MicroBlaze and others       | Private | Yes                  |\n",
    "| GEM5         | Cycle accurate | Alpha, ARM, x86, SPARC, PowerPC and MIPS   | Open    | Yes                  | \n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 Features\n",
    "\n",
    "- Configurable CPU models\n",
    "  - Simple one-IPC (SimpleAtomic/Timing)\n",
    "  - Detailed in-order execution (InOrder)\n",
    "  - Detailed out-of-order execution (O3)\n",
    "\n",
    "- Pluggable memory system \n",
    "  - Stitch memory system together out of components\n",
    "\n",
    "- Device Models\n",
    "  - Enough device models to boot Linux\n",
    "\n",
    "- Many ISAs"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 abstraction levels\n",
    "\n",
    "![gem5 abstraction](figures/gem5_abstractions.png)"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Building gem5"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Building gem5\n",
    "\n",
    "- Recommended virtual  machine images with gem5 preinstalled\n",
    "\n",
    "- Should build on 64 Bit Linux, MacOSX, FreeBSD\n",
    "\n",
    "- For  details Exercise Sheet 01 \n",
    "\n",
    "\n",
    "\n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Building gem5\n",
    "\n",
    "-  ```build/<isa>/<binary>```\n",
    "\n",
    "- ISAs: \n",
    "  - ARM, ALPHA, MIPS, SPARC, POWER, X86\n",
    "\n",
    "We use **ARM**  \n",
    "\n",
    "- Binaries\n",
    "   - gem5.debug  debug build, symbols, tracing, assert\n",
    "   - gem5.opt    optimized build, symbols, tracing, assert\n",
    "   - gem5.fast   optimized build, no debugging, no symbols, no tracing, no assertions\n",
    "   - gem5.prof   gem5.fast + profiling support\n",
    "   \n",
    "We use **gem5.opt**\n",
    "\n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 simulation modes"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 simulation modes\n",
    "\n",
    "- Full system (FS)\n",
    "  - For booting operating systems\n",
    "  - Models bare hardware, including devices \n",
    "  - Interrupts, exceptions, privileged instructions, fault handlers\n",
    "  - Simulated UART output \n",
    "  - Simulated frame buffer output\n",
    "  - complex to configure\n",
    "\n",
    "- Syscall emulation (SE)\n",
    "  - For running individual applications, or set of applications on MP\n",
    "  - Models user-visible ISA plus common system calls\n",
    "  - System calls emulated, typically by calling host OS\n",
    "  - Simplified address translation model, no scheduling\n",
    "  - syscall emulation mode\n",
    " "
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Sample Syscall emulation Mode"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Sample Full system ode"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Full systme mode\n",
    "![Syscall Emulation](figures/gem5_fs.png)"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# gem5 simulation architecture\n",
    "\n",
    "\n",
    "![gem5 architecture](figures/gem5_architecture.svg)"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# SimObjects\n",
    "\n",
    "- Everything you care about is an object (C++/Python)\n",
    "  - Assembled using Python, simulated using C++\n",
    "  - Derived from ```SimObject``` base class\n",
    "  - Common code for creation, configuration parameters, naming, checkpointing, etc.\n",
    "\n",
    "- Uniform method-based APIs for object types\n",
    "  - CPUs, caches, memory, etc.\n",
    "\n",
    "- Easy reuse of system components\n",
    "  - Functional vs. detailed CPU\n",
    "  - Conventional vs. indirect-index cache\n",
    "  \n",
    "- Easy replication: cores, multiple systems\n",
    "\n",
    "- ```MemObjects``` are special kinds of ```SimObjects``` that can be connect using ports "
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Ports / MemObjects\n",
    "\n",
    "\n",
    "- Used for connecting MemObjects together\n",
    "  - e.g. enable a CPU to issue reads/writes to a memory\n",
    "\n",
    "- Correspond to real structural ports on system components\n",
    "  - e.g. CPU has an instruction and a data port\n",
    "\n",
    "- Ports have distinct roles, and always appear in pairs\n",
    " \n",
    " \n",
    "- A MasterPort is connected to a SlavePort\n",
    "  - Send and receive function pairs transport packets\n",
    "\n",
    "- Quite Similar to TLM-2 initiator and target socket () \n",
    "\n",
    "\n",
    "![gem5 ports](figures/gem5_ports.png)\n",
    " \n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "slideshow": {
     "slide_type": "slide"
    }
   },
   "source": [
    "# Full System Simulation"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "# Full System Simulation "
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "# Full System SImulation"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {
    "collapsed": true
   },
   "outputs": [],
   "source": []
  }
 ],
 "metadata": {
  "celltoolbar": "Slideshow",
  "kernelspec": {
   "display_name": "Python 2",
   "language": "python",
   "name": "python2"
  },
  "language_info": {
   "codemirror_mode": {
    "name": "ipython",
    "version": 2
   },
   "file_extension": ".py",
   "mimetype": "text/x-python",
   "name": "python",
   "nbconvert_exporter": "python",
   "pygments_lexer": "ipython2",
   "version": "2.7.10"
  }
 },
 "nbformat": 4,
 "nbformat_minor": 0
}